ARM FPGA board
I envision this being used for development of unique digital synthesis systems based on a hybrid of 32-bit ARM MCU acting as a powerful command interpreter and realtime scheduler, along with the FPGA/SRAM/CODEC which combine to provide a powerful audio synthesis and effects engine.
Potential applications include:
Here's the schematic.
Here're the gerbers.
Here's the BOM.
Here's the Bootloader source.
Here's the Base firmware source.
Here's the Test FPGA source.
Here's the gEDA schematic.
Here's the gEDA PCB design.
ARM code for this will be based on the SparkFun LPC2148 USB Bootloader. This will allow downloading files from a PC to the MicroSD card, including ARM firmware updates, FPGA bitstreams, wavetables and other run-time data. Future development may include run-time access to the USB port for full-speed (12Mbps) communication between the ARMFPGA board and a control PC.
Development will be based on the widely-available ARM-GCC compiler toolchain (Win, Mac, Linux) for MCU firmware development, coupled with Xilinx's freely available ISE Webpack (Win, Linux only) for FPGA synthesis.
12-25-08 - Initial paper design.
12-27-08 - start schematics.
01-20-09 - most parts have been received and the pcb design is in the fab. First prototype testing should happen sometime in mid-February.
02-14-09 - PCB back from fab. Found a few fab problems due to minimum trace width violations (see image). Resulting shorts easily scraped off.
02-21-09 - ARM processor, micro SD, bootloader and LCD work.
02-23-09 - FPGA shows up on JTAG, serial config from SD works.
02-27-09 - Assembly complete, all major sections of circuitry working.
02-28-09 - Simple sine & saw oscillator working.
03-21-09 - Added MIDI receive (note on/off, pitch bend, CCs).
03-22-09 - Added 2-operator FM waveshaping (mod/carr ratio on CC knob, mod index on modulation wheel).
03-28-09 - Added Linear ADSR, external SRAM delay and feedback. Found first hardware bug: SRAM data bits 6,7 hooked to input-only pins on FPGA.
04-05-09 - Improve MIDI responsivness with foreground/background partitioning. Widened delay data to 24 bits, add headroom in feedback calcs.
04-14-09 - Expo release for ADSR. Sample sounds on my site at SDIY.org.
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